Silicon Valley, September 25, 2025 — Taiwan Semiconductor Manufacturing Company (TSMC), the world’s largest contract chipmaker, has unveiled a groundbreaking approach to chip design that leverages artificial intelligence to significantly reduce energy consumption in AI computing systems. The announcement was made during a technology conference in Silicon Valley, where TSMC showcased its collaboration with leading chip design software firms Cadence Design Systems and Synopsys.
The initiative aims to address the growing energy demands of AI servers, which can consume up to 1,200 watts during peak performance — equivalent to powering approximately 1,000 U.S. homes continuously. TSMC’s new strategy involves the use of chiplets, smaller modular components of a chip, each built using different technologies and integrated into a single package. This modular design enhances performance and efficiency while allowing for greater customization.
Central to this innovation is the use of AI-powered software tools developed by Cadence and Synopsys. These tools have demonstrated the ability to outperform human engineers in complex design tasks, completing processes in minutes that would traditionally take days. Jim Chang, Deputy Director of TSMC’s 3DIC Methodology Group, highlighted the transformative impact of these tools, stating, “This thing runs five minutes while our designer needs to work for two days.”
The AI-driven design process not only accelerates development timelines but also maximizes the capabilities of TSMC’s advanced manufacturing technologies. By optimizing chip architecture and layout, the software helps reduce power consumption without compromising performance — a critical advancement as data centers and AI applications continue to scale globally.
Industry experts also pointed to the limitations of traditional electrical interconnects in chip manufacturing, which are increasingly becoming bottlenecks in data transfer. Optical connections are being explored as a potential solution, though they remain unreliable for large-scale deployment. Kaushik Veeraraghavan, an engineer at Meta Platforms, noted that overcoming these physical constraints will be essential for future breakthroughs in chip efficiency.
TSMC’s announcement signals a pivotal shift in semiconductor design, combining AI innovation with advanced manufacturing to create more sustainable and scalable computing solutions. As demand for energy-efficient AI infrastructure grows, this collaboration sets a new benchmark for the industry.
